Device and method for block code error correction
US7181669B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2003 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | Jul 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/1515
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A device and method for block code error correction. The device includes a block code input unit, an erasing address table, an error table and a decoder. The block code input unit is used to input a block code. The erasing address table and the error table have a plurality of erasing entities and error entities in rows and columns, respectively. The decoder decodes the block code in a row direction based on the erasing address table to find data errors on rows and update the error table, and updates the erasing address table in the row direction according to a first determination principle. Next, the decoder decodes the block code in a column direction based on the erasing address table to find data errors on columns and update the error table, and updates the erasing address table in the column direction according to a second determination principle.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.