Method of dividing circuit pattern, method of manufacturing stencil mask, stencil mask and method of exposure
US7181722B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2004 |
| Grant date | Feb 20, 2007 |
| Priority date | — |
| Expiry date | May 12, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F1/20
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
A method of dividing a circuit pattern for creating complementary stencil masks corresponding to complementary patterns, the method comprising a step of dividing a circuit pattern into a plurality of complementary patterns including a first complementary pattern comprising a pattern of a cantilevered beam member having a support portion width W1 and a length L1, and a second complementary pattern comprising a pattern of a both end-supported beam member having a support portion width W2 and a length L2. The dividing of the circuit pattern is performed in a manner that a aspect ratio A1 (L1/W1) of the pattern of the cantilevered beam member is confined to not more than 100, and that a aspect ratio A2 (L2/W2) of the pattern of the both end-supported beam member is confined to not more than 150.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.