Method of manufacturing a semiconductor device
US7183127B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2003 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Jan 31, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02E10/50
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A semiconductor device array comprising highly densely arranged nano-size semiconductor devices is prepared by a simple method. The array comprises a porous body having cylinder-shaped pores formed by removing cylinder-shaped regions from a structure that includes a matrix member formed so as to contain silicon or germanium and the cylinder-shaped regions containing aluminum and dispersed in the matrix member, semiconductor regions formed in the pores, each having at least a p-n or p-i-n junction, and a pair or electrodes, arranged respectively on the top and at the bottom of the semiconductor regions. The semiconductor regions and the pair of electrodes form a plurality of semiconductor devices on a substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.