Semiconductor device and method of manufacturing the same
US7183144B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 18, 2005 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Mar 18, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/60
Abstract
According to the present invention, a pixel TFT (an n-channel TFT) having a considerably low OFF current value and a high ratio of an ON current value to an OFF current value can be realized. In a pixel portion, an electrode having a taper portion with a width of 1 μm or more is formed. An impurity region is formed by adding an impurity through the taper portion, so that the impurity region has a concentration gradient. Then, only the taper portion is removed to form the pixel TFT in the pixel portion. In the impurity region of the pixel TFT in the pixel portion, the concentration gradient is provided in a concentration distribution of the impurity imparting one conductivity, whereby a concentration is made small on the side of a channel forming region and a concentration is made large on the side of a semiconductor layer end portion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.