Reliability circuit for applying an AC stress signal or DC measurement to a transistor device
US7183791B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 11, 2004 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Oct 11, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit is provided, which includes a transistor device under test, an AC drive circuit, an AC bias circuit and a DC bias circuit. The AC drive circuit generates an AC drive signal. The AC bias circuit biases the transistor device under AC bias conditions in response to the AC drive signal. The DC bias circuit biases the transistor device under DC bias conditions. A switch circuit selectively couples the transistor device to the AC bias circuit in an AC stress mode and to the DC bias circuit in a DC measurement mode.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.