Semiconductor output circuit
US7183802B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 15, 2005 |
| Grant date | Feb 27, 2007 |
| Priority date | — |
| Expiry date | Aug 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/127
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The semiconductor output circuit of the invention has an insulated gate transistor including a first terminal, a second terminal and a gate terminal, a conductive state of the insulated gate transistor being controlled by a drive circuit connected to the gate terminal, a capacitive element and a first resistor connected in series between the second terminal and the gate terminal, and a second resistor connected between the gate terminal and the first terminal. The insulated gate transistor has a cell area formed on a semiconductor substrate, in which a plurality of unit cells each defining a unit transistor connected between the first and second terminals are laid out. The second resistor has such a resistance that all of the unit transistors defined by the unit cells are turned on uniformly when electrostatic discharge is applied to the first or second terminal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.