Method of forming an integrated circuit employable with a power converter
US7186606B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 23, 2004 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Nov 13, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
Abstract
A method of forming an integrated circuit employable with a power converter. In one embodiment, the method of forming the integrated circuit includes forming a transistor employable as a switch of a power train of the power converter by forming a gate over a semiconductor substrate. The method of forming the transistor also includes forming a source/drain by forming a lightly doped region adjacent a channel region recessed into the semiconductor substrate, forming a heavily doped region adjacent the lightly doped region, and forming an oppositely doped well within the channel region. The method of forming the transistor further includes forming a doped region with a doping concentration profile less than the heavily doped region between the heavily doped region and the oppositely doped well. The method of forming the integrated circuit also includes forming a driver switch of a driver to provide a drive signal to the transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.