Semiconductor device
US7187069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 5, 2004 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Dec 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention provides a technique which, without causing two problems, i.e., (1) increased number of power supply/grounding pins and (2) increased power feed line inductance, prevents the noise causing a problem in a control circuit, from becoming routed around and induced into an output buffer. More specifically, the above can be realized by using either of two methods: (A) providing an on-chip bypass capacitor for the control circuit and isolating a power feed route of the control circuit from that of the output buffer in an AC-like manner, or (B) designing electrical parameters (inserting resistors) such that the oscillation mode of any electrical parameter noise induced into the power feed routes will change to overdamping.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.