System for reducing amplitude digital-to-analog converter (DAC) resolution in a polar transmitter
US7187314B1 · kind B1 · utility
7Cited by
3References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 30, 2005 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Sep 30, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/66
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A system for reducing digital-to-analog converter (DAC) resolution for an amplitude modulated signal comprises a first logic configured to determine a desired DAC output voltage range, a second logic configured to select a DAC reference voltage level corresponding to the desired DAC output voltage range, a third logic configured to select a number of digital bits for conversion to the analog domain, the number of bits chosen from a larger number of digital bits, and a DAC configured to receive the selected DAC reference voltage level and convert the selected number of digital bits to a signal in the analog domain.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.