Patent · US Expired

Method and apparatus for controlling power state of a multi-lane serial bus link having a plurality of state transition detectors wherein powering down all the state transition detectors except one

US7188263B1 · kind B1 · utility

69Cited by
4References
17Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 7, 2003
Grant dateMar 6, 2007
Priority date
Expiry dateFeb 11, 2025

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F1/3209
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

An arrangement provides for further power reduction where a system includes two or more electrical components that can be placed into two or more power consumption states. The arrangement can take advantage of existing circuitry to selectively disable certain state transition detectors to thereby provide additional power reduction.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.