Integrated circuit
US7188277B2 · kind B2 · utility
4Cited by
14References
32Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2003 |
| Grant date | Mar 6, 2007 |
| Priority date | — |
| Expiry date | Sep 20, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31705
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit (“IC”) comprising a plurality of logic modules. The IC further comprises a plurality of bus segments each associated with one of the logic modules; a debug bus interconnecting the bus segments in a ring; and a debug port connected to the debug bus for accessing debug data on the debug bus. Each bus segment takes in data from the logic module associated therewith and outputs the data to the debug bus to be forwarded to the next bus segment along the ring.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.