Semiconductor device and method for manufacturing same
US7190011B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 14, 2005 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Sep 2, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/13091
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
There is provided a technique for obtaining improved maximum allowed value for the antenna ratio while inhibiting the damage on the gate insulating film of the MOSFET. A semiconductor device having a configuration that comprises a silicon substrate, a contact interlayer film, a first interconnect interlayer film, a first via interlayer film and a second interconnect interlayer film, all of which are sequentially formed in this order, comprises two protective diodes, which are coupled to a MOSFET via the second interconnect.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.