Semiconductor device having elevated source/drain on source region and drain region
US7190035B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 18, 2004 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Aug 22, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device disclosed herein comprises: an element isolation insulator which is formed on the surface side of a semiconductor substrate to provide electrical insulation from other elements, a height of a surface of the element isolation insulator being equal to or lower than that of a surface of the semiconductor substrate; a stopper which is formed of a material different from that of the element isolation insulator and which is at a predetermined distance from the semiconductor substrate so as to protrude from the surface of the element isolation insulator; and an elevated source/drain which is formed on a source region and a drain region so as to be elevated from the surface of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.