Systems for wafer level burn-in of electronic devices
US7190184B2 · kind B2 · utility
11Cited by
15References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 12, 2002 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Aug 12, 2022 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01S5/423
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
In one example, a wafer level burn-in system includes a first electrode plate for providing electrical contact simultaneously to contacts of a group of semiconductor devices borne by a semiconductor wafer on a device surface of the semiconductor wafer. A second electrode plate is employed for providing electrical contact to a substrate surface of the semiconductor wafer. Finally, an electrical power generator is employed for providing electrical power to the group of semiconductor devices through the contacts and the substrate of the semiconductor wafer through the first and second electrode plates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.