Schmoo runtime reduction and dynamic calibration based on a DLL lock value
US7191279B2 · kind B2 · utility
2Cited by
2References
26Claims
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Key dates
| Filing date | Dec 16, 2003 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Jun 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/2254
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Methods of setting numerically controlled delay lines using step sizes based on a delay locked loop lock value are presented herein. In one embodiment, a method may comprise, for example, one or more of the following: calculating an offset value for at least one NCDL; and interpolating a new offset value for the at least one NCDL, based on a change in a delay locked loop (DLL) output value from a previous DLL output value to a new DLL output value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.