Methods and apparatus for correcting data and error detection codes on the fly
US7191382B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2003 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Apr 22, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M13/093
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
When data is read from a disk and stored in volatile memory, check bits are generated and stored in the memory using an algorithm such as cyclical redundancy check (CRC). The CRC algorithm operates on the basis of the bit length in which the data is organized, such as 8 bits. If the data has errors, an error correction code (ECC) algorithm is used to correct the data errors, but the ECC algorithm operates on the basis of symbols having a different bit length, such as 10 bits. To avoid having to re-read the data from the volatile memory to adjust the CRC value, the CRC algorithm is executed on selected mask data developed by the ECC algorithm, the CRC algorithm being executed on the basis of the second bit length to generate a CRC mask. The CRC mask corrects the stored CRC value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.