Method and apparatus for thermal testing of semiconductor chip designs
US7191413B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 11, 2005 |
| Grant date | Mar 13, 2007 |
| Priority date | — |
| Expiry date | Apr 23, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/2874
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method and apparatus for thermal testing of semiconductor chip designs is provided. One embodiment of a novel method for performing thermal testing of a semiconductor chip design includes calculating full-chip temperatures over the semiconductor chip design (e.g., to identify steep thermal gradients) and positioning temperature sensors within a corresponding semiconductor chip in accordance with the calculated full-chip temperatures (e.g., in the regions of steep thermal gradients). Thus, temperature sensors are strategically placed in the regions where they are most likely to be needed, according to calculated temperatures, rather than randomly positioned throughout a test chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.