Configurable integrated circuit with offset connection
US7193438B1 · kind B1 · utility
25Cited by
66References
21Claims
0Family size
Inventors
Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Jun 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Some embodiments of the invention provide an configurable integrated circuit (“IC”). This IC has at least fifty configurable nodes arranged in an array that several rows and columns. The IC also has several direct offset connections, where each particular direct offset connection connects two offset nodes that are neither in the same column nor in the same row in the array. In some embodiments, several direct connections do not include any intervening circuits. On the other hand, in some embodiments, several direct connections have intervening circuits, which differ from the nodes in the array.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.