Active load circuit for low-voltage CMOS voltage gain amplifier with wide bandwidth and high gain characteristic
US7193468B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 14, 2004 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | May 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45644
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Provided is an active load circuit of a voltage gain amplifier, which allows a high voltage gain with a low supply voltage operation in high-frequency range. The active load circuit includes a PMOS transistor which is connected between the amplifying unit and a power supply voltage and functions as a load element in a low frequency range; a negative feedback buffering unit which is connected to the gate of the PMOS transistor and functions as a common drain amplifier to stabilize the output voltage of the voltage gain amplifier and drive the voltage gain amplifier at a low voltage; and a capacitor which is connected to the negative feedback buffering unit and compensates for both an impedance and a frequency characteristics when the voltage gain amplifier operates in a high frequency range.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.