Apparatus for providing a jittered clock signal and apparatus for providing a random bit
US7193481B2 · kind B2 · utility
5Cited by
3References
10Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Sep 3, 2004 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Sep 14, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K3/84
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An apparatus for providing a jittered clock signal has a reverse-biased diode. The reversed-biased diode has a leakage current which decreases a reverse voltage on the diode, time-dependent on a shot-noise of the leakage current. The apparatus for providing a jittered clock signal further has a unit for periodically increasing the reverse voltage of the diode to a value, which is above a switching value and the apparatus has a unit for comparing the reverse voltage of the diode to the switching value and for outputting a jittered clock signal dependent on the comparison.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.