Device and method with reduced information leakage
US7194633B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 30, 2002 |
| Grant date | Mar 20, 2007 |
| Priority date | — |
| Expiry date | Feb 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2209/12
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention is directed to a data-processing system comprising a processor, a second encrypted cryptographic key stored in a first persistent memory, and a cryptographic co-processor that comprises a first register and a second register. The cryptographic co-processor serves for decrypting in a decryption step the second encrypted cryptographic key, thereby generating therefrom a second unencrypted cryptographic key that is usable by the processor for executing an operation. For the decryption step the first register is loadable with the second encrypted cryptographic key and the second register is loadable with a first cryptographic key. The resulting second unencrypted cryptographic key is maintainable in one of the registers for being used by the cryptographic co-processor for decrypting encrypted information or encrypting unencrypted information for the operation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.