Method and system for low noise amplifier (LNA) and power amplifier (PA) gain control
US7196582B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 29, 2004 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Jan 6, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03G2201/307
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Methods and systems for processing signals are disclosed herein. In one aspect of the invention a circuit for processing signals may comprise a triple well (TW) NMOS transistor coupled to an amplifier core. The TW NMOS transistor may track process and temperature variations (PVT) of at least one NMOS transistor within the amplifier core. A drain of the TW NMOS transistor may be coupled to a first inductor and the first inductor may be coupled to a first voltage source. The first voltage source may generate a standard voltage of about 1.2V. A source of the TW NMOS transistor may be coupled to a second inductor and the second inductor may be coupled to the first voltage source. A gate of the TW NMOS transistor may be coupled to a second voltage source, where the second voltage source may generate a standard voltage of about 2.5V.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.