Phase interpolator based clock recovering
US7197101B2 · kind B2 · utility
27Cited by
6References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2002 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Dec 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/07
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An arrangement for a phase interpolator based clock recovery system, a phase interpolator, and a voltage controller for a highly linear phase interpolator system is provided. Embodiments comprise a method, apparatus, system, and machine-readable medium to recover a clock signal for clocked data based on a local clock signal. In some embodiments, the local clock signal may also be used to transmit the clocked data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.