Circuit, system and method for encoding data to be stored on a non-volatile memory array
US7197594B2 · kind B2 · utility
116Cited by
1References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2003 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Aug 29, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/109
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention is a method, circuit and system for storing bits on a Non-Volatile Memory (“NVM”) array. According to some embodiments of the present invention, a bit scrambling block may rearrange the received block of bits according to a spreading pattern. An error correction code block may generate an error correction code (“ECC”) based on either the original block of bits or based on the rearranged block of bits, and a data storing circuit may store in the NVM array the ECC and the block of bits from which the ECC was not derived.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.