Communication interface for diagnostic circuits of an integrated circuit
US7197680B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 17, 2003 |
| Grant date | Mar 27, 2007 |
| Priority date | — |
| Expiry date | Jul 1, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R31/31713
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
An integrated circuit including diagnostic circuitry having serial scan chains or debug bus access circuits for establishing communication using an interface circuit coupled with a bi-directional serial link to an external diagnostic device. The bi-directional serial link carries both data and control signals. The serial protocol provides for a pacing signal for indicating to the external diagnostic device when it is ready to receive more data and/or when it has completed a particular diagnostic operation. This provides a self-pacing ability. A training signal generated by the external diagnostic device is detected by the interface circuit on initialization and used to derive sampling point timings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.