System and method for verifying HDL events for observability
US7200778B2 · kind B2 · utility
2Cited by
9References
21Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Mar 28, 2003 |
| Grant date | Apr 3, 2007 |
| Priority date | — |
| Expiry date | Aug 16, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/33
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In one embodiment, the invention is directed to a method of verifying conditions occurring during a simulation of a hardware design. The method comprises logging each occurrence of at least one specified condition in a first log; logging signals observed at an observability port in a second log; and comparing the first and second logs to determine whether for each occurrence of the at least one specified condition logged in the first log, a corresponding entry identifying a signal expected to be observed responsive to occurrence of the at least one specified condition is logged in the second log.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.