Thin film transistor and method for fabricating the same
US7202501B2 · kind B2 · utility
5Cited by
2References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 17, 2004 |
| Grant date | Apr 10, 2007 |
| Priority date | — |
| Expiry date | Aug 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6729
Abstract
A thin film transistor formed by using a Metal Induced Lateral Crystallization process and method for fabricating the same. The thin film transistor comprises an active layer having source/drain regions and a channel region, a gate electrode, an insulating layer having contact holes for exposing a portion of each of the source/drain regions, and a crystallization inducing pattern exposing a portion of the active layer. The source/drain electrodes are coupled to the source/drain regions through the contact holes, and the crystallization inducing pattern does not couple the source/drain regions to the source/drain electrodes.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.