Phase interpolator
US7203259B2 · kind B2 · utility
30Cited by
7References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jan 2, 2002 |
| Grant date | Apr 10, 2007 |
| Priority date | — |
| Expiry date | Apr 19, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0337
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
An arrangement for generating a clock signal. Embodiments provide a method, apparatus, system, and machine-readable medium to interpolate phases of a reference clock signal to output an interpolated clock signal. Some embodiments may output the clock signal as a recovered clock signal for a phase interpolator-based clock recovery system. Many embodiments may interpolate a changing phase of an interpolated clock signal with substantially analog transitions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.