Method and system for routing in low density parity check (LDPC) decoders
US7203887B2 · kind B2 · utility
175Cited by
3References
18Claims
0Family size
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Key dates
| Filing date | Jul 3, 2003 |
| Grant date | Apr 10, 2007 |
| Priority date | — |
| Expiry date | Jul 6, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04H40/90
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An approach is provided for decoding a low density parity check (LDPC) coded signal. Edge values associated with a structured parity check matrix used to generate the LDPC coded signal are retrieved from memory. The edge values specify the relationship of bit nodes and check nodes, and are stored within memory according to a predetermined scheme that permits concurrent retrieval of a set of the edge values. A decoded signal corresponding to the LDPC coded signal is output based on the retrieved edge values.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.