Multilayer circuit including stacked layers of insulating material and conductive sections
US7205655B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 23, 2004 |
| Grant date | Apr 17, 2007 |
| Priority date | — |
| Expiry date | Mar 27, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/055
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
The invention relates to the manufacturing of a multilayer structure and especially it relates to the manufacturing of a three-dimensional structure and its use as an electronics assembly substrate and as a winding for transformers and inductors. When a multilayer structure is manufactured by folding a conductor-insulator-conductor laminate, where the conductor layers to be separated from each other follow each other on opposite sides of the conductor-insulator-conductor laminate in the sections following each other and where the insulator has been removed from the places where the conductor layers are to be connected together after folding, it is possible to manufacture a wide range of three-dimensional multilayer structures where the volume occupied by the windings over the total volume can be maximized. Alternatively, by using the method it is also possible to manufacture a multilayer structure where components have been buried inside. The method makes it also possible to make connections between layers in a flexible manner. Among other issues, the method can be easily automated for mass-production.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.