Circuit for high-resolution phase detection in a digital RF processor

US7205924B2 · kind B2 · utility

Assignee

• TEXAS INSTRUMENTS INCORPORATED · US

Inventors

• Sudheer K. Vemulapalli · Allen, US
• John Wallberg · Richardson, US
• Prasant Kumar Vallur · Hyderabad, IN
• Robert Bogdan Staszewski · Garland, US

Key dates

• Filing date: Nov 15, 2005
• Grant date: Apr 17, 2007
• Expiry date: Nov 15, 2025

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L7/091
• WIPO field: Measurement
• WIPO sector: Instruments

Abstract

A novel time-to-digital converter (TDC) used as a phase/frequency detector and charge pump replacement in an all-digital PLL within a digital radio processor. The TDC core is based on a pseudo-differential digital architecture making it insensitive to NMOS and PMOS transistor mismatches. The time conversion resolution is equal to an inverter propagation delay, e.g., 20 ps, which is the finest logic-level regenerative timing in CMOS. The TDC is self calibrating with the estimation accuracy better than 1%. The TDC circuit can also serve as a CMOS process strength estimator for analog circuits in large SoC dies. The circuit also employs power management circuitry to reduce power consumption to a very low level.