Compensating jitter in differential data signals
US7206368B2 · kind B2 · utility
11Cited by
16References
19Claims
0Family size
Assignee
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Key dates
| Filing date | Oct 30, 2002 |
| Grant date | Apr 17, 2007 |
| Priority date | — |
| Expiry date | Dec 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/033
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A method for compensating jitter in received differential data signals includes recovering a first clock signal from the received differential data signals. Re-timed differential data signals are generated based on the received differential data signals and the first clock signal. A level of jitter in the re-timed differential data signals is detected. A second clock signal is recovered from the re-timed differential data signals. Jitter-compensated differential data signals are generated based on the re-timed differential data signals, the second clock signal, and the detected level of jitter.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.