Package substrate manufactured using electrolytic leadless plating process, and method for manufacturing the same
US7208349B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 6, 2004 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Apr 16, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49155
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a package substrate includes forming a first copper plated layer on a base substrate having through holes and inner surfaces of the through hole, coating a first resist over the first copper plated layer, partially removing the first resist, forming a second copper plated layer on the first copper plated layer, stripping the first resist, coating a second resist over the resultant structure, and removing the second resist from regions where wire bonding pads and solder ball pads are to be formed, removing exposed portions of the first copper plated layer, forming the wire bonding pads and the solder ball pads, removing the second resist, removing exposed portions of the first copper plated layer, and coating a solder resist over all surfaces of the resultant structure, and removing portions of the solder resist respectively covering the wire bonding pads and the solder ball pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.