Integrated circuit radio front-end architecture and applications thereof
US7209727B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 12, 2003 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Jan 8, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45386
- WIPO fieldTelecommunications
- WIPO sectorElectrical engineering
Abstract
An integrated RF front-end architecture is disclosed. Such an integrated RF front-end architecture includes a multi-tap balun, a low noise amplifier and a power amplifier core. The multi-tap balun includes a single-ended primary winding and a symmetrical multi-tap secondary winding, wherein the single-ended primary winding is operably coupled to an antenna. The low noise amplifier is coupled to a first set of taps of the symmetrical multi-tap secondary winding. The power amplifier core is coupled to a second set of taps of the symmetrical multi-tap secondary winding and can be a two stage amplifier having a driver stage and an output stage. The multi-tap balun, low noise amplifier and power amplifier core can be on-chip components or can be fabricated to be discrete components on a printed circuit board.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.