Pulse stretching architecture for phase alignment for high speed data acquisition
US7209848B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 24, 2005 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Oct 24, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L7/0331
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
Systems and methods for pulse stretching architectures for phase alignment of multi-frequency clocks for high speed data acquisitions are disclosed. A high speed data acquisition system includes a transmitter and a receiver. The receiver includes a multi-frequency clock generator that generates a plurality of clock signals, a pattern check module that detects a test pattern received from the transmitter and outputs a stretch command signal, and a stretch pulse generator that receives the stretch command signal and provides a stretch pulse signal that aligns the phases of the plurality of clock signals generated by the multi-frequency clock generator. Methods for initializing and shifting multi-phase clock signals to optimize error performance of a high speed data acquisition system are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.