Apparatus and method for interrupt control
US7209993B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 24, 2004 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | May 3, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/24
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An interrupt control apparatus comprising an interrupt vector register for holding address information corresponding to interrupt resources of a first type which are managed by an operating system and interrupt resources of a second type which are not managed by the operating system. Regarding an interrupt generated by an interrupt resource of the first type, the interrupt control apparatus in the present invention launches a common interrupt entry function which is subject to a scheduling process common to the interrupt resources of the first type, based on the address information of the interrupt vector register. At the same time, with regard to an interrupt generated by an interrupt resource of the second type, the interrupt control apparatus in the present invention launches an extended interrupt entry function which is not subject to the aforementioned scheduling process, based on the address information held in the interrupt vector register.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.