Methods of and apparatus for efficient buffer cache utilization
US7210001B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 16, 2004 |
| Grant date | Apr 24, 2007 |
| Priority date | — |
| Expiry date | Aug 6, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2211/1028
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Efficient buffer cache utilization frees a data buffer as soon as data buffer processing is completed, and without losing association of the freed data buffer and a descriptor buffer. Separate free buffer link lists identify the freed data buffer and any freed descriptor buffer. The data buffer is rapidly processed then freed generally before completion of processing of the descriptor buffer, freeing the processed associated data buffer before the associated descriptor buffer is freed. The association of the processed free data buffer and the descriptor buffer may be ended to enable the more frequent use of the large capacity data buffer for other update requests.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.