Method of using capacitive bonding in a high frequency integrated circuit
US7211465B2 · kind B2 · utility
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2References
8Claims
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Assignee
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Key dates
| Filing date | Jul 5, 2005 |
| Grant date | May 1, 2007 |
| Priority date | — |
| Expiry date | Jul 5, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/924
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacturing a high frequency integrated circuit begins by positioning a die within a package, wherein the die includes a circuit that processes a high frequency signal and at least one bond pad operably coupled to the circuit, and wherein the package includes a plurality of bond posts, wherein at least one of the plurality of bond posts is allocated to the at least one bond pad. The method continues by bonding a first plate of a capacitor to the at least one bond pad. The method continues by bonding a second plate of the capacitor to the at one of the plurality of bond posts.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.