System and method for programming a memory cell
US7211843B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2003 |
| Grant date | May 1, 2007 |
| Priority date | — |
| Expiry date | Nov 11, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention relates to systems and methods for programming a memory cell. More specifically, the present invention relates to a controlled application of current to a memory cell over a controlled time period. The invention utilizes a current mirror configuration having a first transistor and a second transistor, wherein the second transistor is coupled to the memory cell. Programming of the memory cell includes applying a voltage to the first transistor, whereby a first current is generated in the first transistor. A gate of the second transistor is coupled to the first transistor, whereby a second current is generated in the second transistor. The second current is proportional to the first current. The second current is provided to the memory cell, whereby the second current programs the memory cell.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.