Capacitor-related systems for addressing package/motherboard resonance
US7211894B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 12, 2005 |
| Grant date | May 1, 2007 |
| Priority date | — |
| Expiry date | Apr 20, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
According to some embodiments, a device includes a first conductive plane electrically coupled to a first terminal associated with a first polarity and a second terminal associated with the first polarity, a second conductive plane electrically coupled to a third terminal associated with a second polarity, a dielectric disposed between the first conductive plane and the second conductive plane, a third conductive plane electrically coupled to the second terminal and not electrically coupled to the first terminal, and a second dielectric disposed between the second conductive plane and the third conductive plane. A first capacitance is present between the first terminal and the third terminal, a second capacitance is present between the second terminal and the third terminal, and the first capacitance and the second capacitance may be substantially dissimilar.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.