Method using receive and transmit protocol aware logic modules for confirming checksum values stored in network packet
US7213074B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Jun 10, 2003 |
| Grant date | May 1, 2007 |
| Priority date | — |
| Expiry date | Nov 25, 2025 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D30/00
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
The invention provides a low-cost, high-bandwidth file server, which is implemented in a single integrated semiconductor. High-bandwidth is achieved through the use of a shared memory buffer, protocol aware logic, and a modified network stack. The shared memory buffer allows data flow from the network to the storage device without the need of a single copy. The protocol aware logic and modified network stack also greatly improves bandwidth, while decreasing the processor workload. Another improvement allows for a smaller processor that can run at slower clock speeds, and thus requires far less silicon while using far less power than the traditional approach.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.