Semiconductor device configured for reducing post-fabrication damage
US7214568B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 6, 2004 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Mar 23, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T279/11
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes an IC die configured to reduce post-fabrication damage to the device. The IC die is formed such that at least a portion of one or more perimeter edges of the die are beveled by an etching process. The semiconductor device may include a plurality of IC dies, at least one of the IC dies being separated from the semiconductor device by forming one or more v-shaped grooves in an upper surface of the device, the v-shaped grooves defining perimeter edges of the at least one IC die. A back surface of the semiconductor device is removed until at least a portion of the v-shaped grooves are exposed. When the IC die is separated from the semiconductor device in this manner, a sidewall of each of the v-shaped grooves forms a beveled perimeter edge of the separated IC die.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.