Method for the fabrication of isolation structures
US7214596B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2004 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Oct 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/3081
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for manufacturing insulating structures in a semiconductor substrate includes forming a first insulating layer on the semiconductor substrate, forming a stop layer on the first insulating layer, and forming a barrier layer on the stop layer. The barrier layer is selective with respect to the stop layer. A screen layer is formed on the barrier layer. A portion of the screen layer is selectively removed for forming an opening therethrough for exposing a portion of the barrier layer. The exposed barrier layer is removed for exposing a portion of the stop layer. The exposed stop layer is removed for exposing a portion of the semiconductor substrate. The method further includes removing the remaining barrier layer, and removing a portion of the exposed semiconductor substrate for forming a trench therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.