Comparator circuit and power supply circuit
US7215145B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 22, 2004 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Jul 5, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG01R19/16542
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A comparator circuit includes a current mirror circuit, a differential pair, and a first current source between first and second power supply lines. The differential pair includes a first MOS transistor of enhancement mode n-type having a gate electrode at which an input signal is supplied, and a second MOS transistor of depletion mode n-type. A source of the second MOS transistor is connected with a source of the first MOS transistor and a threshold voltage of the second MOS transistor is lower than that of the first MOS transistor. A gate electrode of the first MOS transistor is formed by polycrystalline silicon which contains a p-type impurity. A gate electrode of the second MOS transistor is formed by polycrystalline silicon which contains an n-type impurity and is connected with the first power supply line. An output signal is output based on a drain voltage of the second MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.