Logical separation and accessing of descriptor memories
US7215662B1 · kind B1 · utility
15Cited by
14References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2002 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Jan 9, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L2012/5665
- WIPO fieldDigital communication
- WIPO sectorElectrical engineering
Abstract
A packet header processing engine includes a memory having a number of distinct portions for respectively storing different types of descriptor information for a header of a packet. A packet header processing unit includes a number of pointers corresponding to the number of distinct memory portions. The packet header processing unit is configured to retrieve the different types of descriptor information from the number of distinct memory portions and to generate header information from the different types of descriptor information.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.