Integrated circuit
US7215940B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 28, 2003 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Feb 1, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03D2200/0084
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention relates to an integrated mixer. A problem with producing low power consumption mixers is that they require a relatively high operating voltage due to the number of layers of transistor between the power rails. Accordingly, an embodiment of the present invention provides a mixer comprising first and second double balanced mixers having first and second anti-phase differential RF and LO input signals; the first double balanced mixer having a first set of four active devices each arranged to mix selected pairs of the input signals and to combine the mixed signals via first and second output nodes to produce a first portion of differential intermediate frequency output signals; the second double balanced mixer having a second set of four active devices each arranged to mix selected pairs of the input signals and to combine the mixed signals via the first and second output nodes to produce a second portion of the differential intermediate frequency output signals; the first and second portions of the output signals being combined at the first and second output nodes to produce the differential output signals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.