Patent · US Expired

Power short circuit testing of an electronics assembly employing pre-characterized power off resistance of an electronic component thereof from a power boundary

US7216051B2 · kind B2 · utility

1Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 26, 2005
Grant dateMay 8, 2007
Priority date
Expiry dateJul 14, 2025

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG01R31/52
  • WIPO fieldMeasurement
  • WIPO sectorInstruments

Abstract

A technique for testing an electronics assembly for a power short circuit is provided. The technique includes pre-characterizing power off resistance of an electronic component(s) of a first packaging level from at least one power boundary of the electronic component(s). The characterizing of the power off resistance occurs prior to placement of the electronic component(s) into an electronics assembly of a higher packaging level. The technique further includes determining actual power off resistance of the electronics component(s) after placement thereof into the electronics assembly, with the actual power off resistance being determined from the at least one power boundary. Thereafter, the actual power off resistance of the electronic component(s) in the electronics assembly is compared with the pre-characterized power off resistance of the at least one electronic component(s), and a determination is made therefrom whether a power short circuit exists within the electronics assembly.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.