Clock control circuit for correcting frequency of second clock signal based on first clock signal and monitoring oscillation state of first clock signal based on second clock signal
US7216250B2 · kind B2 · utility
9Cited by
8References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 23, 2003 |
| Grant date | May 8, 2007 |
| Priority date | — |
| Expiry date | Feb 1, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F1/08
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The present invention relates to a clock control circuit apparatus including a first oscillation circuit for generating a first clock signal and a second oscillation circuit for generating a second clock signal and capable of, when the two clock signals are put to use, improving the reliability of oscillation operations thereof. In the clock control circuit apparatus, a sub-clock correction unit corrects an oscillation frequency of a sub-clock signal on the basis of a main clock signal, while a main clock monitoring unit monitors an oscillation state of the main clock signal on the basis of the sub-clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.