Metallic nanowire interconnections for integrated circuit fabrication
US7217650B1 · kind B1 · utility
23Cited by
9References
13Claims
0Family size
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Key dates
| Filing date | Mar 24, 2004 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Mar 24, 2024 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/843
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for fabricating an electrical interconnect between two or more electrical components. A conductive layer is provided on a substarte and a thin, patterned catalyst array is deposited on an exposed surface of the conductive layer. A gas or vapor of a metallic precursor of a metal nanowire (MeNW) is provided around the catalyst array, and MeNWs grow between the conductive layer and the catalyst array. The catalyst array and a portion of each of the MeNWs are removed to provide exposed ends of the MeNWs.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.