Stack package for high density integrated circuits
US7217994B2 · kind B2 · utility
52Cited by
7References
18Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 1, 2004 |
| Grant date | May 15, 2007 |
| Priority date | — |
| Expiry date | Apr 20, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/1572
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A stack package for a high density memory module includes at least one memory chip, an ASIC and an interposer, wherein the interposer comprises a first surface having contacts arranged in electrical communication with corresponding contacts on the ASIC and a second, substantially opposite surface including contacts arranged in electrical communication with corresponding contacts on a PCB. The at least one memory chip is dimensioned to fit within a cutout section in the interposer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.